Nitin Mohan received his B.Tech. in Electronics Engineering from Institute of Technology-BHU, India in 1999 and MA.Sc. in Electrical and Computer Engineering from University of Waterloo, Canada in ...

The Verilog-AMS hardware description language [1] includes extensions dedicated to compact modeling, but does not define a reserved subset for compact modeling. This lack of specification combined ...

This paper discusses verification process of a mixed signal core of an HSIC PHY. After explaining the specific topic related with HSIC comparison to USB, the verification strategy is shown. The ...